An AI Learned to Tune a Quantum Processor: 33% Faster Gates on a QuantWare QPU

The most expensive time in quantum computing is not training a model or writing an algorithm. It is the hours engineers spend coaxing a finicky quantum processor to stay in tune. Stockholm-based FirstQFM announced on October 15 that it has automated a meaningful slice of that work: its machine learning foundation model designed custom gate implementations for a QuantWare superconducting quantum processor at the Israeli Quantum Computing Center (IQCC), producing single-qubit gates with 33% shorter execution times while preserving gate fidelity, and every result was validated directly on the hardware.

This is not a claim about quantum advantage, error correction, or beating supercomputers. It is something narrower and arguably more useful right now: proof that AI models trained on calibration data can find better ways to operate a quantum chip, shifting work from scarce quantum hardware time onto classical computers. The distinction matters, because calibration is the problem that scales.

What the model actually did

FirstQFM's foundation model learned the operating characteristics of a QuantWare Contralto-D21 quantum processor, a 21-qubit superconducting chip, from calibration data produced by Quantum Machines' calibration stack. It then generated custom pulse-level implementations of single-qubit gates, the microwave pulses that rotate one qubit's state, that run 33% faster than the standard calibrated gates while keeping fidelity the same. The improvement was confirmed using randomized benchmarking, the industry-standard protocol for measuring average gate error by running random sequences of gates on the actual device.

Crucially, the model produced those custom pulses with no additional quantum hardware time required. Quantum Machines' OPX control hardware and QUA software provided the calibration data; the optimization happened on classical compute. That matters because QPU time is the scarcest resource in the field: every hour a processor spends being recalibrated is an hour it cannot run experiments.

The model went beyond single-qubit gates. Two-qubit gates, which create the entanglement that makes quantum computers interesting and which are typically harder to calibrate, also improved. Using existing calibration data plus a short hardware probe, the model identified five qubit pairs with higher Bell-state fidelity, each improvement confirmed in independent hardware runs. Bell-state fidelity measures how closely a two-qubit operation creates a perfect maximally entangled state, so this is a direct measurement of better entanglement, not a proxy metric.

The model produced faster gates with no additional quantum hardware time required. QPU time is the scarcest resource in the field, so that is the number that counts.

Why calibration is the bottleneck

Superconducting qubits are analog devices with digital ambitions. Each qubit and coupler has dozens of operating parameters, and they drift. Neighboring qubits interfere with each other, a problem known as crosstalk. As processors grow from tens of qubits toward hundreds, the calibration problem grows faster than linearly, and the engineers who do it well are rare. FirstQFM said it plainly in the announcement: as superconducting processors grow, calibration becomes a harder control problem, with more operating parameters, device interactions, crosstalk, and drift to characterize and manage.

This is the unglamorous center of the quantum scaling challenge. Headlines track qubit counts and roadmap promises, but a 1,000-qubit chip that takes a team of PhDs a week to recalibrate is a research instrument, not infrastructure. Automating calibration, and doing it well, is a precondition for utility-scale machines. A model that learns a chip's quirks from its calibration history and converts that into faster, equally faithful gates is exactly the kind of tooling the field needs before qubit counts matter.

What this does and doesn't prove

The honest accounting starts with scope. The 33% gate-time reduction is on single-qubit gates of one 21-qubit device, validated by randomized benchmarking, which measures average gate error and is a standard but not exhaustive characterization. The two-qubit improvements cover five selected qubit pairs on that same chip, not the full device. These are real, hardware-validated results, but they are results on a modest research-scale processor, and FirstQFM has framed them that way: the company says it plans to expand the optimization set on the 21-qubit device while scaling the approach in preparation for QuantWare's larger VIO-based QPUs.

It is also worth noting what kind of claim this is. A foundation model for quantum hardware does not add qubits, reduce decoherence, or move anyone closer to fault tolerance. Shorter gates do help error rates indirectly, though: faster gates spend less time exposed to decoherence, the process by which qubits leak information to their environment, so a gate that is 33% shorter at the same fidelity is a genuine performance gain, not a cosmetic one. But the gain is operational, not architectural. The right framing is a better tool for the engineers, not a leap toward the destination.

The four-company stack

The result is also a snapshot of how quantum computing actually gets built: as a supply chain. QuantWare, founded in 2021 by Matt Rijlaarsdam and Alessandro Bruno as a spinout from QuTech at TU Delft, designs and fabricates the processors; the company says it has shipped more quantum processors than any other commercial supplier, serving more than 50 customers across 20 countries, and is backed by investors including Intel Capital and IQT. Quantum Machines provided the control layer: OPX hardware, QUA software, and the automated calibration infrastructure that produced the data FirstQFM's model learned from. NVIDIA supplied the classical muscle: FirstQFM developed its foundation model on NVIDIA accelerated computing, including the Leonardo supercomputer and the CUDA-Q open-source hybrid platform, before fine-tuning it onto the QuantWare processor.

That division of labor is the story underneath the headline. One company makes the chip, another builds the control electronics and calibration software, a third supplies the GPU infrastructure for the AI, and a fourth trains the foundation model that ties the data together. Quantum computing is often sold as a race between flagship systems; the reality, increasingly, is an ecosystem of specialists whose tools have to compose.

What comes next

The test that matters is whether this approach survives scale. Calibration models that work on 21 qubits need to generalize to chips with far more parameters, more crosstalk, and more aggressive drift, and to entirely different device designs. QuantWare's roadmap centers on its VIO QPU architecture for utility-scale superconducting systems, and FirstQFM says scaling toward those larger devices is the plan. Watch for the same numbers, gate-time reduction with fidelity preserved, validated on hardware, reported independently of the vendor that built the model.

The broader lesson is methodological. The quantum industry has spent years chasing the next headline number: qubits, coherence times, benchmark records. Results like this one point in a different direction, toward treating quantum processors as complex physical systems to be learned rather than perfect machines to be built. If the field's biggest near-term wins come from AI that understands the hardware, then the calibration problem, the problem nobody puts on a keynote slide, may be where the real progress happens first.